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首頁 > 標準下載>IEC 63011-2-2018 集成電路--三維集成電路--第2部分:具有細間距互連的堆疊模具的對準 Integrated circuits – Three dimensional integrated circuits – Part 2: Alignment of stacked dies having fine pitch interconnect免費下載
IEC 63011-2-2018 集成電路--三維集成電路--第2部分:具有細間距互連的堆疊模具的對準 Integrated circuits – Three dimensional integrated circuits – Part 2: Alignment of stacked dies having fine pitch interconnect IEC 63011-2-2018 集成電路--三維集成電路--第2部分:具有細間距互連的堆疊模具的對準 Integrated circuits – Three dimensional integrated circuits – Part 2: Alignment of stacked dies having fine pitch interconnect

IEC 63011-2-2018 集成電路--三維集成電路--第2部分:具有細間距互連的堆疊模具的對準 Integrated circuits – Three dimensional integrated circuits – Part 2: Alignment of stacked dies having fine pitch interconnect

  • 標準類別：
  • 標準大?。?/li>
  • 標準編號：IEC 63011-2-2018
  • 標準狀態(tài)：現(xiàn)行
  • 更新時間：2023-09-30
  • 下載次數(shù)：次
標準簡介

This part of IEC 63011 provides specifications of initial alignment and alignment maintenance between multiple stacked integrated circuits during the die bonding process. These specifications define the alignment keys and operating procedures of the keys. These specifications apply only if electrical coupling method of die-to-die alignment is used in the die stacking.dition 1.0 2018-11 INTERNATIONAL STANDARD NORME INTERNATIONALE colour inside Integrated circuits – Three dimensional integrated circuits – Part 2: Alignment of stacked dies having fine pitch interconnect Circuits intégrés – Circuits intégrés tridimensionnels – Partie 2: Alignement de puces empilées à petits pas d'interconnexion IEC 63011-2:2018-11(en-fr) THIS PUBLICATION IS COPYRIGHT PROTECTED Copyright ？ 標準截圖

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